Embedded Computer Modules/COMs

HPE_midiv2_frontplatteHpe50Hpe_IRP stands for Hardware Prototyping and Emulation (Hpe) to help engineers in the development of FPGA hardware in connection with an x86 CPU Platform.

The industrial reference platform is using a Qseven CPU module from MSC to quickly combine custom hardware in the FPGA with a standard Intel® Atom™ design. Furthermore, the Hpe_IRP includes a OSADL (Open Source Automation Development Lab) Linux and CoDeSys, a IEC-61131 software development system from 3S for evaluation. The Altera Arria GX FPGA is the Device-Under-Test (DUT) and is easily programmed with a complete set of tools to assist the designer during the design process.  

It is complemented by the Gleichmann Research ToolsetHpe_desk, a GUI which supports the tools like clock factory, JTAG, AMBA IP manager or the SEmulator, a tool to accelerate  the simulation and debugging.

To help designers in the integration and development of their custom baseboard, all drawings are part of the development kit and may be freely reused. They are accompanied by demo examples, FPGA IP’s and drivers. The same is true for the OSADL Linux distribution and the evaluation copy of the CoDeSys IEC 61131 development environment. After a free period, the tool may be licensed to use all the investment during the evaluation period.